Total Records Found: 4


  • On the Modeling of Error Functions as High Dimensional Landscapes for Weight Initialization in Learning Networks, SAMOS XVI, 2016, Greece

     Julius, Gopinath Mahale, Sumana T, Aditya Chivukula

  • VOP: Architecture of a Processor for Vector Operations in On-line Learning of Neural Networks, 29th International Conference on VLSI Design, 2016, 2016, Kolkata

     Gopinath Mahale, Eshan Bhatia, S. K. Nandy, Ranjani Narayan

  • 2015

  • Hardware Solution For Real-time Face Recognition, 28th International Conference on VLSI Design, 2015, 
    Paper URL

     Gopinath Mahale, Hamsika Mahale, Arnav Goel, S. K. Nandy, Sukumar Bhattacharya, Ranjani Narayan

  • 2014

  • Hardware Architecture of Bi-Cubic Convolution Interpolation for Real-time Image Scaling, Accepted in International Conference on Field Programmable Technology, 2014, 
    Paper URL

     Gopinath Mahale, Hamsika Mahale, Rajesh Parimi, S. K. Nandy, Sukumar Bhattacharya