Total Records Found: 135
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2019

  • A Systematic Approach for Acceleration of Matrix-Vector Operations in CGRA through Algorithm-Architecture Co-design, IEEE VLSI Design 2019, 2019, New Delhi, India

     Farhad Merchant, Tarun Vatwani, Anupam chattopadhyay, Soumyendu Raha, S. K. Nandy, Ranjani Narayan, Rainer Leupers


  • Applying Modified Householder Transform to Kalman Filter, IEEE VLSI Design 2019, 2019, New Delhi, India

     Farhad Merchant, Tarun Vatwani, Anupam Chattopadhyay, Soumyendu Raha, S. K. Nandy, Ranjani Narayan, Rainer Leupers


  • 2018

  • Achieving Efficient Realization of Kalman Filter on CGRA through Algorithm-Architecture Co-design, Springers, 2018, Santorino, Greece

     Farhad Merchant, Tarun Vatwani, Anupam Chattopadhyay, Soumyendu Raha, S. K. Nandy, Ranjani Narayan


  • 2016

  • Performance Evaluation of Feed-Forward Backpropagation Neural Network for Classification on A Reconfigurable Hardware Architecture, 12th International Symposium on Applied Reconfigurable Computing, 2016, Mangaratiba, Rio de Janeiro, Brazil, 22-24 March, 2016
    Paper URL

     Mahnaz Mohammadi, Rohit Ronge, S. K. Nandy


  • Flexible Resource Allocation and Management for Application Graphs on ReNE MPSoC , To appear in Proceedings of 7th PARMA-DITAM workshop, Co located with HiPEAC 2016, 2016, Prague

     Kavitha Madhu, Anuj Rao, Saptarsi Das, Madhava Krishna, S. K. Nandy, Ranjani Narayan, Anup Kini, Makesh Tarun, Preetam Shivaram, Nalesh S


  • VOP: Architecture of a Processor for Vector Operations in On-line Learning of Neural Networks, 29th International Conference on VLSI Design, 2016, 2016, Kolkata
    PDF

     Gopinath Mahale, Eshan Bhatia, S. K. Nandy, Ranjani Narayan


  • Achieving Efficient QR Factorization by Algorithm-Architecture Co-Design of Householder Transformation, VLSI Design 2016, 2016, Kolkata, India

     Farhad Merchant, Tarun Vatwani, Anupam Chattopadhyay, Soumyendu Raha, S. K. Nandy, Ranjani Narayan


  • Efficient Realization of Table Look-up based Double Precision Floating Point Arithmetic, VLSI Design 2016, 2016, Kolkata, India

     Farhad Merchant, Nimash Choudhary, S. K. Nandy, Ranjani Narayan


  • RHyMe: REDEFINE HyperCell Multicore for Accelerating HPC Kernels, 29th International Conference on VLSI Design, 2016, 2016, 
    Paper URL

     Saptarsi Das, Nalesh S, Kavitha Madhu, S. K. Nandy, Ranjani Narayan


  • 2015

  • Energy Aware Synthesis of Application Kernels expresse d in Functional Languages on a Coarse Grained Composable Reconfigurable Array,  The IEEE International Symposium on Nanoelectronic and Information Systems 2015, 2015, Indore
    Paper URL

     Nalesh S, Saptarsi Das, Kavitha Madhu, S. K. Nandy


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