• Application Specific Instruction Set Processor Architecture
  • Reconfigurable High Performance Processor Architectures
  • Systems on Silicon
  • Compiling Techniques for Low Power
  • Architectural Synthesis of High Performance VLSI Systems
  • Parallel/Pipelined low latency
  • High throughput Arithmetic Unit Architectures
  • Multi-threaded Architecture
  • Global Shared Memory Cache Coherence Protocols